V 51
K 419708849300 INV
Y 0
D 0 0 1700 1100
Z 1
i 18
I 16 test:INPUT 1 640 600 0 1 '
C 7 1 8 0
I 18 test:OUTPUT 1 930 600 0 1 '
C 5 1 9 0
I 4 test:NMOS 1 780 464 0 1 '
A 818 547 10 0 9 1 W=WN
A 819 536 10 0 9 1 L=LN
A 810 524 10 0 9 3 M
L 780 464 10 0 3 0 1 0 M1I4
C 7 6 12 0
C 13 3 17 0
C 5 4 16 0
I 3 test:PMOS 1 780 634 0 1 '
A 821 717 10 0 9 1 W=WP
A 820 709 10 0 9 1 L=LP
A 810 699 10 0 9 3 M
L 780 634 10 0 3 0 1 0 M1I3
C 7 5 12 0
C 10 3 15 0
C 5 3 14 0
I 9 test:VDD 1 820 734 0 1 '
C 10 1 4 0
I 12 test:VSS 1 820 424 0 1 '
C 13 1 1 0
I 2 test:SHEET_B 1 0 0 0 1 '
L 0 0 10 0 3 0 1 0 X1I2
N 13
J 840 464 2
J 840 460 3
J 840 464 2
S 2 1
S 2 3
N 10
J 840 734 2
J 840 730 3
J 840 734 2
S 2 1
S 2 3
N 7
J 670 610 2
J 760 610 5
J 760 684 3
J 760 514 3
J 780 684 2
J 780 514 2
S 4 2
S 3 5
S 2 3
S 4 6
S 1 2
L 710 610 10 0 9 0 1 0 A
N 5
J 930 610 2
J 840 610 5
J 840 634 2
J 840 564 2
S 4 2
S 2 3
S 2 1
L 880 610 10 0 9 0 1 0 Z
E
